The DSP802.11S is a complete SDR development/demonstration system comprising low-cost development hardware, software, and firmware. FC802.11 is the firmware component of the solution for implementing 802.11 /a/b/g. The software-configurable core is a fully operational implementation of the 802.11 a/b/g (OFDM) basic functionalities including MAC capabilities. The core and software are designed to target GPP/FPGA architectures including Xilinx Zynq FPGA with an embedded ARM processor. The core is very flexible and designed to be adapted within existing advanced Software Digital Radio (SDR) frameworks and application platforms. DSP802.11S is also supported by Sundance DSP SDR400 RF FMC and suitable FPGA boards. Advanced design flows and testing approaches such as HSL (High-Level Synthesis) and Matlab /Simulink are supported.
Different modules of the DSP802.11 form an OFDM PHY (physical interface) which conforms to standard 802.11 specifications. Since being fully configurable, it may be used to implement custom OFDM-based solutions. MAC layer is also available.
Scrambling, Coding, Interleaving, and Mapping are done in the GPP (programmed in C language).
AGC, FFT/DFT, and Autocorrelation real-time and data-intensive operations are performed within the FPGA (or alternatively in GPP).
- Protocols a/b/g
- Transmission OFDM
- FEC Coding Rates ½, 1/3, 3/4
- Sub-channel Modulation BPSK, QPSK, 16QAM, 64QAM
- FFT/DFT (complex) 256 and 512 points
- PHY Data Rates up to 54 Mb/s
- OFDM Symbol Duration 4 µsec
- Reduced capability subset for basic Rx/Tx operations
- TCP/IP proxy capability
- Data Plane Frame Aggregation
- Control Plane Enhanced Block Ack. TxBF Control, Protection
- Management Plane Channel Switching