Select Page

V3UFMC01P7

AMD UltraScale FMC+ Carrier

Rugged mid-range FPGA processing for cost-sensitive defence, aerospace and industrial programs

 

  • 3U VPX FPGA FMC Carrier aligned with the SOSA Technical Standard
  • AMD UltraScale™ or UltraScale+™ FPGA processor
  • Wide range of OpenVPX slot profiles
  • Data & expansion planes for high-speed protocols
  • SOSA aligned, P2B VITA67.3D profile
    • LightCONEX® 4TRX Optical Module on-board
    • Up to 10 NanoRF from FMC
  • Up to 8GB DDR4 ECC memory
  • VITA 57.1 FMC mezzanine site for I/O module
  • Air or conduction-cooled
  • Designed and made in the Netherlands
  • Long-term Availability and Security Assured

 

CONTACT US FOR A QUOTE
Categories: , ,

Description

The 3U VPX V3UFMC01P7 is a member of Hybrid DSP’s XU01P 1156 Core Series of mid-range, cost effective, rugged processing boards based on the AMD Kintex UltraScale A1156 FPGA package, up to 8GB DDR4 and an ARM-based Board Management Controller (BMC).

The V3UFMC01P7 is a SOSA aligned build option of the V3UFMC01P, providing a combined optical and coax interface in alignment with VITA 65.0 Payload Slot Profile SLT3-PAY-1F1U1S1S1U1U4F1J-14.6.13-4. The optical interface consists of 4 TX and 4 RX fibres, offering 40Gbps of bandwidth in each direction. Up to 10 NanoRF coax cables can be routed to any type of VITA 57.1 FPGA Mezzanine Card.

In addition to numerous standard build options, the design is optimized for rapid customization of many key features including the front-panel, cooling solution, reference firmware, and BMC. Furthermore, the PCB layout and stack-up allows for a viable low-risk route for more complex technical and commercial requirements including modular-to-monolithic.

 

 

Specifications

 

Main Processor and Memory

  • AMD Kintex UltraScale(+)TM A1156 FPGA XCKU035, XCKU040, XCKU060, XCKU095, XQKU040, XQKU060, XQKU095, KU15P
  • DDR4 4GB or 8GB with ECC

 

Board Management

  • Voltage and temperature monitor
  • Power/reset control
  • Tier-3 VITA 46.11 IPMI

 

Backplane Architecture (3U)

  • Up to 16 serial transceiver lanes on VPX P1 (PCIe Gen3, Aurora, Ethernet, RapidIO etc)
  • 16 LVDS on VPX P2A (can be disconnected)
  • 4 TRX 10.3125Gbps optics on VPX P2B
  • 10 NanoRF to FMC on VPX P2B

 

Front Panel I/O

  • FMC+ site per VITA 57.1
  • Extended component-free region

 

Mechanical

  • 3U VPX COTS and Custom air and conduction-cooled (FMC+) compatible heat frame
  • OpenVPX and VPX-REDI
  • Pitch: 1”

 

Board Support Package

  • Vivado project, VHDL-based reference designs, UART and PCIe drivers, API, Python and C/C++ sample applications

 

Compliance

  • OpenVPX System Specification encompasses VITA 46.0, 46.3, 46.4, 46.6, 46.7, 46.9, 46.11
  • Compatible with VITA 65 and SOSA-aligned systems
  • VITA 47.0
  • VITA 48.0/48.1/48.2 (REDI)
  • VITA 57.1

 

VITA 47.0 Construction, Safety and Quality

  • Environmental Class: EAC1, EAC6, ECC1 and ECC3 (-40 C to +70 C operating temperature range)
  • IPC-A-610D Class 3 and IPC-A-600G Class 3
  • Conformal Coating: IPC CC 830B

 

Block Diagram

 

Related products