Select Page

V3UADC01P

AMD UltraScale 8CH ADC

Rugged mid-range FPGA data acquisition and processing for cost-sensitive defence, aerospace and industrial programs

 

  • 3U VPX Monolithic 8CH Digitizer aligned with the SOSA Technical Standard
  • AMD UltraScale™ FPGA processor
  • Data & expansion planes for high-speed protocols
  • Wide range of OpenVPX slot profiles
  • Up to 8GB DDR4 ECC memory
  • Analogue-to-Digital Converter
    • 8-channels 250Msps 14-bit ADC
  • Air or conduction-cooled
  • Designed and made in the Netherlands
  • Long-term Availability and Security Assured

 

CONTACT US FOR A QUOTE

Description

The 3U V3UADC01P is a member of Hybrid DSP’s XU01P 1156 Core Series of mid-range, cost-effective, rugged processing boards based on the AMD Kintex UltraScale A1156 FPGA package, up to 8GB DDR4 and an ARM-based Board Management Controller (BMC).

The V3UADC01P is available with a range of build options for OpenVPX air and conduction-cooled-based systems as well as those aligned with the SOSA Technical Standard. Features include eight ADC channels running at up to 250Msps with coax on either the front panel or optionally VITA 67 coax blind mate connectors on the backplane. The board supports external and internal trigger and clock sources.

In addition to numerous standard build options, the design is optimized for rapid customization of many key features, including the type of coax connectors, front panel design, cooling solution, reference firmware, and BMC.

The monolithic V3UADC01P is based on the V3UFMC01P and a customer’s legacy FMC ADC module. Hybrid DSP’s Modified-COTS optimized base XU01P design permitted a lowrisk, rapid form-fit-function replacement of the existing modular solution leading to simplification of supply-chain, lifecycle management and serviceability, as well as a significant cost-saving across the program lifetime.

 

What’s Included?

  • Python API and reference application
  • VHDL based reference design
  • Vivado reference project

 

Specifications

 

Main Processor and Memory

  • AMD Kintex UltraScaleTM A1156 FPGA XCKU035, XCKU040, XCKU060, XCKU095, XQKU040, XQKU060, XQKU095
  • DDR4 4GB or 8GB with ECC

 

Board Management

  • Voltage and temperature monitor
  • Power/reset control
  • Tier-2 VITA 46.11 IPMI

 

Backplane Architecture (3U)

  • Up to 16 serial transceiver lanes on VPX P1 (PCIe Gen3, Aurora, Ethernet, RapidIO etc)
  • Up to 35 LVDS on VPX P2
  • VITA 65.0 and SOSA aligned slot profiles
  • VITA 67 Coaxial options

 

Analogue Front End

  • 8-channels 250Msps 14 bit ADC
  • ENOB 10.8 bit, SFDR 84dBc

 

Mechanical

  • 3U VPX COTS and Custom air and conduction-cooled compatible heat frame
  • OpenVPX and VPX-REDI
  • Pitch: 1” and 0.8”

 

Board Support Package

  • Vivado project, VHDL based reference designs, UART and PCIe drivers, API, Python and C/C++ sample applications

 

Compliance

  • OpenVPX System Specification encompasses VITA 46.0, 46.3, 46.4, 46.6, 46.7, 46.9, 46.11
  • Compatible with VITA 65 and SOSA aligned systems
  • VITA 47.0
  • VITA 48.0/48.1/48.2 (REDI)

 

VITA 47.0 Construction, Safety and Quality

  • Environmental Class: EAC1, EAC6, ECC1 and ECC3 (-40 C to +70 C operating temperature range)
  • IPC-A-610D Class 3 and IPC-A-600G Class 3
  • Conformal Coating: IPC-CC-830B

 

Block Diagram